Commit be5075c5 authored by David Schimansky's avatar David Schimansky
Browse files

Fix wrong JTAG register entries in manual

parent 85653d4c
......@@ -60,11 +60,15 @@ pdf_tex/%.pdf : svg/%.svg # C
clean :
rm -rf pdf_tex/
rm -f $(PROJECT).aux
rm -f $(PROJECT).log
rm -f $(PROJECT).out
rm -f $(PROJECT).pdf
rm -f $(PROJECT).toc
find . -name '*.out' -type f -delete
find . -name '*.aux' -type f -delete
find . -name '*.toc' -type f -delete
find . -name '*.fls' -type f -delete
rm -rf png/
rm -rf pdf/
rm -f svg/*withBlue.svg
......@@ -124,7 +124,7 @@ like pattern is required during long flattops on one track and the others need t
% \JtagRegisterPart{Repetition Counter}{14 $\times$ (5 + 5)}{Bits which determine how often a sub
% sequence of the corresponding \DDYN\ signal is repeated. 14 of these tuples are stored in
% series.}\hline
\JtagRegisterPart{Static IPROG}{11:0}{Sequencer output levels per track for the nine tracks when
the chip is in the IPROG state.}
\JtagRegisterPart{Static IDLE}{23:12}{Sequencer output levels per track for the nine tracks when the
......@@ -185,7 +185,7 @@ correctly connected to the xor outputs of the registers.
\JtagInstrTableEntry{Sequencer track registers (9 tracks) }{6-17}{140 each}{\tab{TAB:JTAG:Sequencer}}
\JtagInstrTableEntry{Sequencer hold generator }{18}{75}{ - }
\JtagInstrTableEntry{Sequencer config reg. }{19}{49}{\tab{TAB:JTAG:Sequencer}}
\JtagInstrTableEntry{Sequencer config reg. }{19}{65}{\tab{TAB:JTAG:Sequencer}}
\JtagInstrTableEntry{Switch control register }{20}{133}{\tab{TAB:GlobalControlRegister}}
\JtagInstrTableEntry{DAC control register }{21}{200}{\tab{TAB:DacRegister}}
\EndJtagInstrTable{Slow control registers and addresses.}
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