Skip to content
GitLab
Explore
Sign in
D&E Collaboration Projects
dintef
Repository
Branches
Overview
Active
Stale
All
feature/flow19.0
764bcb86
·
Import the new scripts from version 191 of the tools.
·
Apr 25, 2020
Select Archive Format
Download source code
zip
tar.gz
tar.bz2
tar
SUS65T2_final
83abb418
·
Fix bug in send_test_data function
·
Jul 28, 2020
Select Archive Format
Download source code
zip
tar.gz
tar.bz2
tar
SUS65T3-manual
be5075c5
·
Fix wrong JTAG register entries in manual
·
Nov 04, 2020
Select Archive Format
Download source code
zip
tar.gz
tar.bz2
tar
petaDebugFirmware
3261c6b4
·
Change gui simulation dump file location. Remove try/except block for JTAG programming
·
Nov 16, 2020
Select Archive Format
Download source code
zip
tar.gz
tar.bz2
tar
debug
77b00810
·
Dump the code used for debugging.
·
Nov 25, 2020
Select Archive Format
Download source code
zip
tar.gz
tar.bz2
tar
SUS65T3-newDAQPath
70f7d474
·
Instantiate T3 Controller
·
Nov 27, 2020
Select Archive Format
Download source code
zip
tar.gz
tar.bz2
tar
sus_dev_pygui
7c44c6fb
·
add "new config" button to register and sequencer
·
Feb 01, 2021
Select Archive Format
Download source code
zip
tar.gz
tar.bz2
tar
SUS65T3-digital
6a279bea
·
Fixes for linter warnings.
·
Feb 09, 2021
Select Archive Format
Download source code
zip
tar.gz
tar.bz2
tar
SUS65T3-final
72188aa2
·
Merge branch 'sus_dev'
·
Mar 11, 2021
Select Archive Format
Download source code
zip
tar.gz
tar.bz2
tar
feature/remove-hold
593d4a9c
·
Remove the hold configuration register.
·
Mar 16, 2021
Select Archive Format
Download source code
zip
tar.gz
tar.bz2
tar
feature/seq-negedge
db9ab84c
·
Put option to output sequencer tracks on falling edge into DDYN_OutReg instead of Track itself
·
Mar 22, 2021
Select Archive Format
Download source code
zip
tar.gz
tar.bz2
tar
test/simple-logic
e2807b3d
·
Simplify checking the state.
·
Mar 29, 2021
Select Archive Format
Download source code
zip
tar.gz
tar.bz2
tar
feature/jtag-core
54f1c3fc
·
Move the DAC register to jtag_top.
·
Apr 04, 2021
Select Archive Format
Download source code
zip
tar.gz
tar.bz2
tar
feature/pads
7be7eeee
·
Work towards placing the digital I/O pads in the digital flow.
·
May 25, 2021
Select Archive Format
Download source code
zip
tar.gz
tar.bz2
tar
feature/genus-jtag
77c4a978
·
Import the new SV IC RESET register.
·
May 25, 2021
Select Archive Format
Download source code
zip
tar.gz
tar.bz2
tar
feature/ddr-ddyn
cf1e3f1b
·
Output the SDF last.
·
Jun 10, 2021
Select Archive Format
Download source code
zip
tar.gz
tar.bz2
tar
feature/partitions
83b80068
·
Add scripts for the partitioned flow (2 versions).
·
Jul 16, 2021
Select Archive Format
Download source code
zip
tar.gz
tar.bz2
tar
include-RAM
82d89195
·
Add M8 blockage near the FE's MIMCAPs.
·
Jul 21, 2021
Select Archive Format
Download source code
zip
tar.gz
tar.bz2
tar
feature/ddyn-ClkCPFine
e8d88603
·
Add extra sequencer track (ddyn12) for charge pump of fine stage
·
Jul 29, 2021
Select Archive Format
Download source code
zip
tar.gz
tar.bz2
tar
SUS65T5-digital
30ba14f9
·
Automatically reset the entire digital part during POR.
·
Aug 27, 2021
Select Archive Format
Download source code
zip
tar.gz
tar.bz2
tar
Prev
1
2
3
Next