API changes for consistency; First configuration helpers

parent 06f4f612
This diff is collapsed.
......@@ -213,10 +213,10 @@ def go(card):
clock=FilterClock.CLK_100_MHz)})
# Set both output cells' levels to TTL.
card.set_output_level({9: Level.TTL, 10: Level.TTL})
card.set_output_channels_level({9: Level.TTL, 10: Level.TTL})
# Enable input termination on all inputs except ic 9 and ic10.
card.set_50ohm_adapters(dict([(i, True) for i in range(1, 9)]))
card.set_input_channels_50ohm_adapter(dict([(i, True) for i in range(1, 9)]))
# Set input cells 1's (1) and 2's (2) filter configuration
# to short pulse capture.
......@@ -226,7 +226,7 @@ def go(card):
2: FilterInput(clock=FilterClock.CLK_100_MHz,
selection=FilterInputSelection.SINGLE_SHORT_PULSE_CAPTURE)})
card.set_input_level({1: Level.TTL, 2: Level.TTL})
card.set_input_channels_level({1: Level.TTL, 2: Level.TTL})
fifo = ct2.create_fifo_mmap(card)
......
......@@ -48,10 +48,10 @@ def main():
p201.set_clock(Clock.CLK_100_MHz)
# channel 10 output: counter 10 gate envelop
p201.set_output_level({counter: Level.TTL})
p201.set_output_channels_level({counter: Level.TTL})
# no 50 ohm adapter
p201.set_50ohm_adapters({})
p201.set_input_channels_50ohm_adapter({})
# channel 9 and 10: no filter, no polarity
p201.set_output_channels_filter({})
......@@ -65,7 +65,7 @@ def main():
hard_stop = getattr(CtHardStopSrc, "CT_{0}_EQ_CMP_{0}".format(counter))
ct_config = CtConfig(clock_source=CtClockSrc.CLK_1_MHz,
gate_source=CtGateSrc.GATE_CMPT,
hard_start_source=CtHardStartSrc.SOFTWARE_ONLY,
hard_start_source=CtHardStartSrc.SOFTWARE,
hard_stop_source=hard_stop,
reset_from_hard_soft_stop=True,
stop_from_hard_stop=True)
......
......@@ -45,10 +45,10 @@ def main():
p201.set_clock(Clock.CLK_100_MHz)
# channel 10 output: counter 10 gate envelop
p201.set_output_level(dict([(ct, Level.TTL) for ct in p201.COUNTERS]))
p201.set_output_channels_level(dict([(ct, Level.TTL) for ct in p201.COUNTERS]))
# no 50 ohm adapter
p201.set_50ohm_adapters({})
p201.set_input_channels_50ohm_adapter({})
# channel 9 and 10: no filter, no polarity
p201.set_output_channels_filter({})
......@@ -64,7 +64,7 @@ def main():
hard_stop = getattr(CtHardStopSrc, "CT_{0}_EQ_CMP_{0}".format(counter))
cfg = CtConfig(clock_source=CtClockSrc.CLK_1_MHz,
gate_source=CtGateSrc.GATE_CMPT,
hard_start_source=CtHardStartSrc.SOFTWARE_ONLY,
hard_start_source=CtHardStartSrc.SOFTWARE,
hard_stop_source=hard_stop,
reset_from_hard_soft_stop=True,
stop_from_hard_stop=True)
......
......@@ -49,10 +49,10 @@ def main():
p201.set_clock(Clock.CLK_100_MHz)
# channel 10 output: counter 10 gate envelop
p201.set_output_level({counter: Level.TTL})
p201.set_output_channels_level({counter: Level.TTL})
# no 50 ohm adapter
p201.set_50ohm_adapters({})
p201.set_input_channels_50ohm_adapter({})
# channel 9 and 10: no filter, no polarity
p201.set_output_channels_filter({})
......@@ -66,7 +66,7 @@ def main():
hard_stop = getattr(CtHardStopSrc, "CT_{0}_EQ_CMP_{0}".format(counter))
ct_config = CtConfig(clock_source=CtClockSrc.CLK_1_MHz,
gate_source=CtGateSrc.GATE_CMPT,
hard_start_source=CtHardStartSrc.SOFTWARE_ONLY,
hard_start_source=CtHardStartSrc.SOFTWARE,
hard_stop_source=hard_stop,
reset_from_hard_soft_stop=True,
stop_from_hard_stop=True)
......
......@@ -38,7 +38,7 @@ def prepare(card, counter, value):
hard_stop = getattr(CtHardStopSrc, "CT_{0}_EQ_CMP_{0}".format(counter))
ct_config = CtConfig(clock_source=CtClockSrc.CLK_1_MHz,
gate_source=CtGateSrc.GATE_CMPT,
hard_start_source=CtHardStartSrc.SOFTWARE_ONLY,
hard_start_source=CtHardStartSrc.SOFTWARE,
hard_stop_source=hard_stop,
reset_from_hard_soft_stop=True,
stop_from_hard_stop=False)
......
......@@ -89,14 +89,14 @@ class TestP201(unittest.TestCase):
10: ct2.Level.TTL },
{9: ct2.Level.NIM,
10: ct2.Level.NIM },):
self.p201.set_output_level(c)
r = self.p201.get_output_level()
self.p201.set_output_channels_level(c)
r = self.p201.get_output_channels_level()
self.assertEqual(c, r)
def test_output_channels_level(self):
for c in ({9:0, 10:0}, {9:1, 10:0}, {9:0, 10:1}, {9:1, 10:1}):
self.p201.set_output_channels_level(c)
r = self.p201.get_output_channels_level()
self.p201.set_output_channels_software_enable(c)
r = self.p201.get_output_channels_software_enable()
self.assertEqual(c, r)
def test_output_channels_source(self):
......@@ -140,9 +140,9 @@ class TestP201(unittest.TestCase):
for i in range(1, 11):
channels[i] = i % 2 != 0
self.p201.set_50ohm_adapters(channels)
self.p201.set_input_channels_50ohm_adapter(channels)
result = self.p201.get_50ohm_adapters()
result = self.p201.get_input_channels_50ohm_adapter()
self.assertEqual(result, channels)
def test_p201_counters_latch_sources(self):
......
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