test_ct2_card.py 4.38 KB
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# -*- coding: utf-8 -*-
#
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# This file is part of the bliss project
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#
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# Copyright (c) 2016 Beamline Control Unit, ESRF
# Distributed under the GNU LGPLv3. See LICENSE for more info.
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import unittest

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from bliss.controllers.ct2 import card
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class TestP201(unittest.TestCase):

    def setUp(self):
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        self.p201 = card.P201Card()
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        self.p201.set_interrupts()
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        self.p201.reset()
        self.p201.software_reset()

    def tearDown(self):
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        self.p201.set_interrupts()
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        self.p201.reset()
        self.p201.software_reset()

    def test_clock(self):
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        self.p201.set_clock(card.Clock.CLK_DISABLE)
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        clock = self.p201.get_clock()
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        self.assertEqual(clock, card.Clock.CLK_DISABLE)
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        self.p201.set_clock(card.Clock.CLK_66_66_MHz)
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        clock = self.p201.get_clock()
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        self.assertEqual(clock, card.Clock.CLK_66_66_MHz)
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    def test_output_level(self):
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        for c in ({9: card.Level.DISABLE,
                   10: card.Level.DISABLE },
                  {9: card.Level.TTL,
                   10: card.Level.NIM },
                  {9: card.Level.NIM,
                   10: card.Level.TTL },
                  {9: card.Level.TTL,
                   10: card.Level.TTL },
                  {9: card.Level.NIM,
                   10: card.Level.NIM },):
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            self.p201.set_output_channels_level(c)
            r = self.p201.get_output_channels_level()
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            self.assertEqual(c, r)
                  
    def test_output_channels_level(self):
        for c in ({9:0, 10:0}, {9:1, 10:0}, {9:0, 10:1}, {9:1, 10:1}):
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            self.p201.set_output_channels_software_enable(c)
            r = self.p201.get_output_channels_software_enable()
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            self.assertEqual(c, r)

    def test_output_channels_source(self):
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        srcs = ({9: card.OutputSrc.CLK_1_MHz,
                 10: card.OutputSrc.DISABLE },
                {9: card.OutputSrc.DISABLE,
                 10: card.OutputSrc.CH_1_RISING_FALLING },
                {9: card.OutputSrc.CT_6_START_STOP,
                 10: card.OutputSrc.CT_8_SWITCH })
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        for src in srcs:
            self.p201.set_output_channels_source(src)
            result = self.p201.get_output_channels_source()
            self.assertEqual(src, result)

    def test_output_channels_filter(self):
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        filters = ({ 9: card.FilterOutput(clock=card.FilterClock.CLK_12_5_MHz,
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                                         enable=True, polarity=0),
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                     10: card.FilterOutput(clock=card.FilterClock.CLK_10_KHz,
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                                          enable=False, polarity=1),},)
        for filter in filters:
            self.p201.set_output_channels_filter(filter)
            result = self.p201.get_output_channels_filter()
            self.assertEqual(filter, result)

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    def test_channels_interrupts(self):
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        triggers = { 1: card.TriggerInterrupt(rising=True), 
                     5: card.TriggerInterrupt(falling=True), 
                     10: card.TriggerInterrupt(rising=True, falling=True), }
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        self.p201.set_channels_interrupts(triggers)
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        for ch in (2,3,4,6,7,8,9):
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            triggers[ch] = card.TriggerInterrupt()
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        result = self.p201.get_channels_interrupts()
        
        
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        self.assertEqual(triggers, result)

    def test_50ohm_adapter(self):
        # enable odd channels; disable even ones
        channels = {}
        for i in range(1, 11):
            channels[i] = i % 2 != 0
        
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        self.p201.set_input_channels_50ohm_adapter(channels)
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        result = self.p201.get_input_channels_50ohm_adapter()
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        self.assertEqual(result, channels)

    def test_p201_counters_latch_sources(self):
        input = { 1: set((10,)), 
                  2: set((3, 4, 5)),
                  5: set((5, 6, 7))}
        
        expected_ret = {
            "A": (1<<(10-1)) | \
                 ( ( 1<<(3-1) | 1<<(4-1) | 1<<(5-1) ) << 16 ), # counter 2
            "B": 0,
            "C": 1<<(5-1) | 1<<(6-1) | 1<<(7-1),
            "D": 0,
            "E": 0,
            "F": 0,
        }

        ret = self.p201.set_counters_latch_sources(input)
        self.assertEqual(ret, expected_ret)

        expected_output = dict(input)
        for i in [3, 4] + range(6, 13):
            expected_output[i] = set()

        output = self.p201.get_counters_latch_sources()
        self.assertEqual(output, expected_output)
           
        
if __name__ == "__main__":
    unittest.main()